Chevin Technology releases 25G Ultra Low Latency MAC/PCS for Xilinx Virtex® Ultrascale™ FPGAs

September 2016: Ilkley, UK

Chevin Technology Limited is excited to add the Low Latency 25Gbit/s MAC/PCS IP product to its existing range of Ultra Low Latency IP cores. The 25G LL MAC/PCS combines Chevin Technology’s 25GMAC and 25GPCS IP cores to significantly increase the efficiency and rate of data transfer by providing lowest possible latency. The IEEE Std 802.3by-2016 compliant 25G LL MAC/PCS supports straightforward integration of 25Gbit/s Ethernet connectivity in Xilinx Virtex® Ultrascale™ FPGAs.


25G LL MAC PCS + PMA25G MAC25G PCS + PMA25G PCS25G PCS without CC
Total Round Trip Time128 ns20.5 ns107.5 ns64 ns27.8 ns
LUTS79302680525051002283
*25G PCS core includes clock compensation (CC) logic for maximum functionality using Xilinx PMA (25Gbit transceivers)

Used individually, the 25G MAC has a round trip time (RTT) of only 20.5 ns, and the 25G LL PCS has a RTT of 107.5 ns. The combined 25G LL MAC/PCS transfers data at an impressive packet RTT of 128 ns on the Virtex® Ultrascale™ FPGA. The cut-through mode operation minimizes latency, and the store-and-forward feature allows for minimum application load. The 25G LL MAC/PCS uses 7930 LUTs (MAC: 2680 LUTS, PCS: 5250 LUTS) and features Deficit Idle Count / Programmable IFG; Fault Management, BER monitoring; Statistics counters for parameters such as frames and bytes sent/received into size bins, FCS errors, and frame types. The FIFOs for clock compensation and clock domain conversion can be removed to achieve absolute minimum latency.

Available now, the 25G LL MAC/PCS is offered with a range of competitively priced licenses to suit the size and requirements of each project. Customers can evaluate the RTT for themselves using a bitfile on Chevin Technology’s eco-system partner Alpha Data’s ADM-PCIE-8V3 board. The 25G LL MAC/PCS is also compatible with Xilinx’s VCU108 board, and interoperates with the Mellanox MCX4121A-ACAT NIC. Deliverables include a reference design for Alpha Data’s ADM-PCIE-8V3 board, data sheet & user guide, compiled netlist, simulation test bench; build scripts for Vivado® and integration support.

"The 25G ultra low latency MAC/PCS cores are a valuable addition to the range of Chevin Ethernet IP. The Chevin 25G IP running on the Alpha Data ADM-PCIE-8V3 provides a complete off-the-shelf foundation for exploiting the features of the Xilinx Virtex® Ultrascale™ FPGA in accelerated networking applications. With proven performance, stability and interoperability, customers can design and deploy with confidence."

David Miller, Managing Director, Alpha Data

About Chevin Technology

Chevin Technology has been supplying engineering design services since 2003, and offer high performance Low Latency IP Solutions for data storage & capture systems, signal processing systems, trade execution and monitoring, high performance computing & Big Data systems, and data mining. Chevin Technology is a member of the Xilinx Alliance Partnership. Visit www.chevintechnology.com for further information about our IP cores.

About Alpha Data

Established in 1993, Alpha Data is a world leader in high performance Xilinx FPGA based plug-in acceleration boards for Data Center applications. For more information on Alpha Data and its products, please visit www.alpha-data.com

OpenPOWER Summit Europe
(Barcelona, Spain)

26-28th Oct 2016


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Alpha Data is attending OpenPOWER Summit Europe.

Contact: David Miller for further information.


Conference Details available on the OpenPOWER website.


SC16 - Supercomputing Conference
(Salt Lake City, UT)

14-17th Nov 2016


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Alpha Data is exhibiting at SC16 (Booth #2607 ).

Contact: Adam Smith for further information.

Conference Details available on the SC16 website.


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