DIGITAL Products

Features

• Front Panel Data Protocol Interface
• The battery is needed for the "AES Bitstream Encryption" capability of the Xilinx^® Devices. It is required to maintain the AES encryption key such that the FPGA can be loaded with an encrypted bitstream. For all applications using this function either the FPGA board or the attached XRM must have the battery facility.. The XRM provides holders for a back-up battery. Uses SR60 or equivalent batteries.

Applications

• General purpose I/O Interface

Features

• 146 discrete digital I/Os LVDS/LVTTL
• The battery is needed for the "AES Bitstream Encryption" capability of the Xilinx^® Devices. It is required to maintain the AES encryption key such that the FPGA can be loaded with an encrypted bitstream. For all applications using this function either the FPGA board or the attached XRM must have the battery facility.. The XRM provides holders for two back-up batteries. Uses SR60 or equivalent batteries.

Applications

• General purpose Serial and Parallel I/O Interface

Features

• 7x High Speed Serial I/O
• 112 discrete digital I/Os LVDS/LVTTL
• The battery is needed for the "AES Bitstream Encryption" capability of the Xilinx^® Devices. It is required to maintain the AES encryption key such that the FPGA can be loaded with an encrypted bitstream. For all applications using this function either the FPGA board or the attached XRM must have the battery facility.. The XRM provides holders for two back-up batteries. Uses SR60 or equivalent batteries.

Applications

• General purpose I/O Interface

Features

• 34 discrete digital I/Os LVDS/LVTTL
• The battery is needed for the "AES Bitstream Encryption" capability of the Xilinx^® Devices. It is required to maintain the AES encryption key such that the FPGA can be loaded with an encrypted bitstream. For all applications using this function either the FPGA board or the attached XRM must have the battery facility.. The XRM provides holders for two back-up batteries. Uses SR60 or equivalent batteries.

Applications

• General purpose I/O Interface

Features

• 25 discrete I/O Interface
• The battery is needed for the "AES Bitstream Encryption" capability of the Xilinx^® Devices. It is required to maintain the AES encryption key such that the FPGA can be loaded with an encrypted bitstream. For all applications using this function either the FPGA board or the attached XRM must have the battery facility.. The XRM provides holders for two back-up batteries. Uses SR60 or equivalent batteries.