![]() ![]() ![]() | Product Features
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Product Summary The ADM-XRC-4 is a high performance reconfigurable PMC/PMC-X (PCI Mezzanine Card) based on the Xilinx® Virtex-4 LX and SX range of Platform FPGAs. Features include high speed PCI interface, external memory, high density I/O, programmable clocks, temperature monitoring, battery backed encryption (by using an appropriate XRM) and flash boot facilities. A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features. | |


| Product | ADM-XRC-4 | |
| Board Format | PMC | |
| Type | FPGA Board | |
| Host Interface | PCI | |
| Functional Summary | The ADM-XRC-4 is a high performance reconfigurable PMC/PMC-X (PCI Mezzanine Card) based on the Xilinx® Virtex-4 LX and SX range of Platform FPGAs. | |
| Functional Description | Features include high speed PCI interface, external memory, high density I/O, programmable clocks, temperature monitoring, battery backed encryption (by using an appropriate XRM) and flash boot facilities. A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features. | |
| Target Device(s) | family : Virtex-4 footprint : FF1148 devices : LX80, LX100, LX160, SX55 | |
| Host Interface | Universal PCI rev 2.2 compliant PLX 9656 ASIC with 66MHz 64-bit PCI bus and 66MHz 32-bit local bus. Twin DMA controllers. FIFO and interrupt controller peak data rate 533MBytes/sec. | |
| IO Modules Compatible with ADM-XRC-4 | XRM-ADC-D2/125, XRM-ADC-D3/1G5, XRM-ADC-D6/250, XRM-ADC-D7-500, XRM-ADC-S4/3G, XRM-CAMERALINK, XRM-CLINK-MINI, XRM-CLINK-ADV, XRM-DAC-D3/275, XRM-DAC-D4/1G, XRM-DDR, XRM-DVI-D-RX, XRM-FCN, XRM-FCN-C1, XRM-FPDP, XRM-HD-SDI, XRM-IO146, XRM-IO146-ROCKET, XRM-IO34, XRM-MDR, XRM-OPT, XRM-RIO, XRM-RS485, XRM-VIDEO-IO, XRM-ZBT | |
| Carriers Compatible with ADM-XRC-4 | ||
| On board memory | SSRAM : 24MByte in 6 independent banks (48MByte available as a build option) ZBT : 6 x 1024K x 32-bits (4 banks on SX55 version) - independent SRAM clock FLASH : 16MByte Flash FLASH : Configuration Flash providing an initialisation design for automatic loading into the target FPGA. | |
| Software | Drivers for Microsoft Windows™, Linux and VxWorks™ The ADM-XRC Gen 2 SDK provides the example C and HDL source code, giving software engineers and FPGA designers a head start in creating applications. | |
| Applications | Signal Processing Network monitor camera interface | |
| Front Connector I/O |
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| Rear Connector IO |
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| Board Configuration | Clocks : Local bus clock programmable up to 66MHz for transfers between PCI bridge and User FPGA. High performance user clock programmable up to 500MHz using LVPECL with very low jitter. Additional 200MHz reference clock for IOB delay circuits. Selectmap : Download and read-back performance up to 66MB/s peak. FPGA : PCI Bus direct to SelectMAP port From Flash direct on power up External JTAG connector | |
| Battery | Dual battery back-up for IP encryption keys via XRM | |
| Environmental Specifications | Temperature Options: EMC: FCC 47CFR Part 2 EN55022 Equipment Class B | |
Further Environmental Information can be found by reading: |
| Product code |
ADM-XRC-4/z-y(m)(c) | |
Virtex-4 device | z | LX80, LX100, LX160, SX55 |
Virtex-4 speed | y | 10, 11, 12 |
Memory | m | blank=24MB, /24=48MB |
Cooling | c | blank = air cooled commercial, /AC1 = air cooled industrial |
Order Code Rules: When AC1 Cooling selected, -12 devices are not available | ||
Sample Code :
ADM-XRC-4/LX80-10
Go to Order Code Generation Page which allows the generation of specific order codes. The numbers created on this page are for illustration purposes, please contact Alpha Data for more information.
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