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Product Summary The ADM-XRC-6TL is a high performance reconfigurable XMC (VITA 42.3 Mezzanine Card) based on the Xilinx® Virtex-6 LXT and SXT ranges of Platform FPGAs. Features include high speed PCI Express® interface, external memory, high density I/O, temperature monitoring, battery backed encryption and flash boot facilities. A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features. The optional fitting of the Pn4 connector provides an additional 32 General Purpose IO (GPIO) links to the carrier card. | |
| Product | ADM-XRC-6TL | ||
| Board Format | XMC | ||
| Type | FPGA Board | ||
| Host Interface | PCI Express® x4 | ||
| Functional Summary | The ADM-XRC-6TL is a high performance reconfigurable XMC (VITA 42.3 Mezzanine Card) based on the Xilinx® Virtex-6 LXT and SXT ranges of Platform FPGAs. | ||
| Functional Description | Features include high speed PCI Express® interface, external memory, high density I/O, temperature monitoring, battery backed encryption and flash boot facilities. A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features. The optional fitting of the Pn4 connector provides an additional 32 General Purpose IO (GPIO) links to the carrier card. | ||
| Target Device(s) | family : V6 footprint : FFG1759 devices : LX240T, LX365T, LX550T, SX315T, SX475T | ||
| Host Interface | PCI Express® x1, x2, x4 link to separate bridge device with 1GB/s local link to user FPGA 2 DMA Controllers Interrupt Controller | ||
| On board memory | SDRAM : 1GByte in 4 independent banks (2GByte option) of DDR3 SDRAM @ 800MT/s (32-bit wide - 3.2GB/s) FLASH : Configuration Flash providing an initialisation design for automatic loading into the target FPGA. | ||
| Software | Drivers for Microsoft Windows™, Linux and VxWorks™ API with template designs in VHDL | ||
| Applications | Radar/Sonar Beamforming ELINT Fingerprint Recognition Data Encryption | ||
| Front Connector I/O |
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| Rear Connector IO |
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| Board Configuration | Clocks : Low-jitter 125MHz reference clock, suitable for SerDes applications Low-jitter 200MHz reference clock for IOB delay circuits General purpose user clock programmable between 32MHz and 100MHz Custom clock inputs available through the XRM interface FPGA : PCI Express® direct to SelectMAP port From Flash direct on power up External JTAG connector | ||
| Battery | Battery back-up for IP encryption keys | ||
| Cooling Options | Air Cooled Commercial (standard) AC1 - air cooled industrial CC1 - conduction cooled industrial | ||
| Environmental Specification | Temperature : Air cooled option Operating Temperature 0° to +55°C Non-Operating(Storage) Temperature -40° to +85°C Operating Humidity 5% to 95% at 40°C non-condensing Non-Operating(Storage) Humidity 5% to 95% at 40°C non-condensing EMC : FCC 47CFR Part 2 EN55022 Equipment Class B | ||
Further Environmental Information can be found by reading: |
| Product code |
ADM-XRC-6TL/z-y(m)(c)(p) | |
Virtex-6 device | z | LX240T, LX365T, LX550T, SX315T, SX475T |
Virtex-6 speed | y | 1, 2, 3 |
Memory Size Fitted | m | blank = 1GByte, /2 = 2GByte |
Cooling | c | blank = air cooled commercial, /AC1 = air cooled industrial, /CC1 = conduction cooled industrial |
Pn4 Fitted | p | blank = not fitted, /Pn4 = Pn4 Connector fitted |
Note | not all FPGA speed grades available in all configurations. Contact Alpha Data for full details. | |
Order Code Rules: When Conduction Cooled selected -3 devices are not available When Air Cooled Industrial selected -3 devices are not available When LX550T selected, -3 devices are not available When SX475T selected, -3 devices are not available | ||
Sample Code :
ADM-XRC-6TL/LX240T-1
Order Code generation
Go to Order Code Generation Page which allows the generation of specific order codes. The numbers created on this page are for illustration purposes, please contact Alpha Data for more information.
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