Alpha Data Product : ADPe-XRC-4

ADPe-XRC-4 Overview Block Diagram Specification Ordering Info

Product Features

Board Format : PC
Host I/F : PCI Express^® x8
Target Device(s) : Xilinx Virtex-4 {FX100, FX140} (FF1517)
SDRAM : 1GByte in 4 independent banks
FLASH : Configuration Flash providing an initialisation design for automatic loading into the target FPGA.
Drivers for Microsoft Windows™, Linux and VxWorks™
The ADM-XRC Gen 2 SDK provides the example C and HDL source code, giving software engineers and FPGA designers a head start in creating applications.

Product Summary

The ADPe-XRC-4 is a high performance reconfigurable PCI Express^® card based on the Xilinx^® Virtex-4 FX range of Platform FPGAs.

Features include high speed PCI Express^® interface, external memory, high density I/O, programmable clocks, temperature monitoring, battery backed encryption (by using an appropriate XRM) and flash boot facilities.

A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features.

Product

ADPe-XRC-4

Board Format

Type

FPGA Board

Host Interface

PCI Express^® x8

Functional Summary

The ADPe-XRC-4 is a high performance reconfigurable PCI Express^® card based on the Xilinx^® Virtex-4 FX range of Platform FPGAs.

Functional Description

A comprehensive cross platform API with support for Microsoft Windows™, Linux and VxWorks™ provides access to the full functionality of these hardware features.

Target Device(s)

family : Virtex-4

footprint : FF1517

devices : FX100, FX140

Host Interface

PCI Express^® x1, x4, x8 link

Twin DMA Controllers

IO Modules Compatible with ADPe-XRC-4

XRM-ADC-D2/125, XRM-ADC-D3/1G5, XRM-ADC-D6/250, XRM-ADC-D7-500, XRM-ADC-S4/3G, XRM-CAMERALINK, XRM-CLINK-MINI, XRM-CLINK-ADV, XRM-DAC-D3/275, XRM-DAC-D4/1G, XRM-DVI-D-RX, XRM-FPDP, XRM-HD-SDI, XRM-IO146, XRM-IO146-ROCKET, XRM-IO34

On board memory

SDRAM :

1GByte in 4 independent banks

FLASH :

Configuration Flash providing an initialisation design for automatic loading into the target FPGA.

Software

Drivers for Microsoft Windows™, Linux and VxWorks™

The ADM-XRC Gen 2 SDK provides the example C and HDL source code, giving software engineers and FPGA designers a head start in creating applications.

Front Connector I/O

Up to 146 LVTTL/LVDS I/O

Programmable signaling levels of 1.8V, 2.5V or 3.3V

8 High-Speed Serial Links

8 x 3.125GHz MGTs

Programmable signaling levels of 1.8V, 2.5V or 3.3V

Board Configuration

Clocks :

Local bus clock programmable up to 100MHz

High performance low-jitter LVPECL user clock, programmable up to 500MHz

Additional 200MHz reference clock for IOB delay circuits.

Selectmap :

Download and read-back performance up to 100MB/s peak

FPGA :

PCI Express^® Bus direct to SelectMAP port

From Flash direct on power up

External JTAG connector

Environmental Specification

Temperature :

Air cooled option (AC0)

Operating Temperature 0° to +55°C

Non-Operating(Storage) Temperature -40° to +85°C

Operating Humidity 5% to 95% at 40°C non-condensing

Non-Operating(Storage) Humidity 5% to 95% at 40°C non-condensing

Air cooled industrial option (AC1)

Operating Temperature -20° to +55°C

Non-Operating(Storage) Temperature -40° to +85°C

Operating Humidity 5% to 95% at 40°C non-condensing

Non-Operating(Storage) Humidity 5% to 95% at 40°C non-condensing

EMC :

FCC 47CFR Part 2

EN55022 Equipment Class B

Further Environmental Information can be found by reading:
The Alpha Data Environmental Specification

Product code	ADPe-XRC-4/z-y(c)
Virtex-4 device	z	FX100, FX140
Virtex-4 speed	y	10, 11, 12
Air cooled (comm/ind)	c	blank = air cooled commercial, /AC1 = air cooled industrial

Sample Code :

ADPe-XRC-4/FX100-10

Order Code generation

Go to Order Code Generation Page which allows the generation of specific order codes. The numbers created on this page are for illustration purposes, please contact Alpha Data for more information.