XRM2-ADC-S11 - RF/IF Signal Sampling

AD01302



Applications

  • RF/IF Signal Sampling
  • High-speed Analog signal Sampling

Board Features

  • Alpha Data XRM2 I/O Module
  • Single 12-bit 2000/2500Msps ADC
  • External Clock Input


Summary

The XRM2-ADC-S11 is an XRM2 I/O Module, providing one Analog to Digital converter with 12-bit resolution and sampling rates up to 2000Msps (2500Msps with order code option /25).

Aimed at IF/RF Signal Sampling, the sampling clock can be sourced from either an external clock source or from a clock generated within the attached FPGA board. A programmable input attenuator can be used to vary the full scale input level over a 15 dB range. An Auxiliary I/O port is provided for use as a trigger input and general purpose signaling. The XRM2 communicates to the FPGA via a JESD204B high speed interface.


Board Format

Alpha Data XRM2 I/O Module


Environmental Specifications

Temperature Limits:

CodeCooling OptionOperating Temp.Storage Temp.
MinMaxMinMax
AC1Air Cooled Industrial-40°C+70°C-55°C+100°C

Operating Humidity range:

Up to 95% (non-condensing)

EMC Conformity:

FCC 47CFR Part 2
EN55022:2010 Equipment ClassB

For more information on the operating conditions for the different cooling options go to: Alpha Data Environmental Specification Page.

Or read: Alpha Data Environment Specification (PDF).


I/O Interfaces

Interface TypeQtyDescription
ANALOG I/O (Front Panel)
ADC1Single Analog to Digital Converter
Resolution: 12-bit
Max Clock Rate: 2000Msps (2500Msps with ordering option)
Impedance: 50Ω
Levels: full scale (attenuation=0 dB): +5dBm|full scale (attenuation=15 dB): +20dBm
Connector: SMA
DISCRETE I/O (Front Panel)
External clock input1External clock input
Max Clock Rate: 2500 MHz ( 2000MHz)
Impedance: 50Ω
Levels: -6dBm to +12dBm (nominal 0 dBm)
Connector: SMA
Note: Exceeding the maximum voltage limit may result in permanent degradation of converter
Auxiliary I/O1Auxiliary I/O
Impedance: 4k7Ω (DC Coupled)
Levels: +3V3 LVTTL (DC coupled)
Connector: SMA
User configurable as inputs or outputs, signals direct to FPGA pins.
Note: signals on these connectors must be restricted to 3V3 logic otherwise damage may result.

Software

Example UCF, HDL files and Application software are provided with the board.


Ordering Code
XRM2-ADC-S11(sp)
ParametercodeParameter Description
Sampling Speedsp

blank = 2000Msps,
/25 = 2500Msps

Contact sales for other ordering options

Sample Product Code:

XRM2-ADC-S11


Deliverables

  • XRM2-ADC-S11 Board
  • One Year Warranty
  • One Year Technical Support


Sales Questions

For any sales questions regarding the XRM2-ADC-S11, please e-mail us at:

sales@alpha-data.com


Technical Support

For any technical questions regarding Alpha-Data products please e-mail us at:

support@alpha-data.com








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