ADM-PA100 - High performance data capture and processing

AD01398


Photo 1 of adm-pa100Photo 2 of adm-pa100Photo 3 of adm-pa100Photo 4 of adm-pa100Main Photo of adm-pa100  Board: Versal ACAP PCIE SDRAM Fast I/O : Commercial Data Center Board

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ADM-PA100 Documents

Datasheet (pdf)

Support and Development Kit





Applications

  • High performance data capture and processing
  • CPU offload acceleration
  • Low latency networking and analytics
  • AI Inference for Data Center or Edge applications
  • High Performance Computing
  • Industrial vision and control
  • Lab-based system prototyping
  • Rack level deployments

Board Features

  • FMC+ Interface
  • GigE Interface
  • 1x Firefly™ (x4) Interface
  • System Monitor
  • Heatsink with optional fan

ACAP Features (Hard IP)

  • 400x AI Engines
  • 2x ARM Cortex-A72 MPCore™
  • 2x ARM Cortex-R5 MPCore


Summary

The ADM-PA100 is an adaptable PCIe form factor Versal™ ACAP Data Processing Unit suitable for early development and rapid deployment of solutions based on Xilinx™ Versal ACAP VC1902 AI Core device.

The PCIe form factor is suitable for desktop, lab, rack mount and data center deployments in commercial temperature ranges. Additionally, the board can optionally be deployed stand-alone without any reliance on a host CPU. The FMC+ interface on the board allows off-chip support of the many standard and custom interfaces that can be supported by the Versal ACAP through the very wide range of Alpha Data and 3rd Party FMC IO adapters available. Flexible reference designs, allowing customers to access the full IO flexibility of the chip are provided for both the Vivado and Vitis tool chains.

The powerful VC1902 ACAP AI Core device provides a flexible device featuring 400 AI Engine VLIW processor cores capable of 133 INT8 TOPs for Machine Learning or DSP applications, with support for scalar processing on on-chip 2 ARM® Cortex™ A72 Application class CPU cores and 2 ARM Cortex R5 real-time CPU core. These processors are complemented by a large area of 7nm Programmable Logic containing 900k LUTs, almost 2000 DSP tiles and 164Mb of very high bandwidth SRAM suitable for attaching extremely high performance and high efficiency offload acceleration to the ARM and AIE array processors. The device provides, and the board allows, access to a large number of configurable IO pins and Gigabit Transceiver ports which can connect to built-in hard-IP cores for 100G Multi-rate Ethernet, PCIe and DDR4, or can be controlled by custom IO logic in the programmable fabric supporting an incredibly wide range of communication standards and applications.





Board Format

PCIe 3/4 Length, full height, Dual Slot, includes front panel

Width: 267.2mm Height: 126.3mm Depth: 39.9mm Weight: PCB assembly - 210g: with fans heatsink and covers - 1150g


Environmental Specifications

Temperature Limits:

Operating Temperature range: 0°C to +55°C

Storage Temperature range: -40°C to +85°C

Operating Humidity range: Up to 95% (non-condensing)


Host I/F

PCI Express® Gen3 x16


Target Device

Xilinx Versal ACAP

VC1902-2MS - A2197


ACAP Resources

DeviceFFsLUTsDSPsBRAMURAM
VC1902-2MS899.8k196834Mb130Mb

ACAP Hard IP Cores

  • 400x AI Engines
  • 2x ARM Cortex-A72 MPCore™
  • 2x ARM Cortex-R5 MPCore

On Board Memory

Memory TypeNo. BanksMemory Size
(per bank)
DDR4-SDRAM21G x 72 (8GiB)
DDR4-3200

System Monitor

All power rails are sequenced and monitored by a TI Fusion IC. The TI Fusion controller monitors certain voltage readings, current readings, and Power OK signals to determine the state of the system. A PC can directly interact with the TI Fusion IC via the onboard PMBUS interface.


FPGA Configuration

  • From onboard Flash or uSD Card
  • Through USB board management (built-in JTAG)
  • MCAP Interface for Staged Configuration and Dynamic Function eXchange

The USB/JTAG Interface is compatible with all of the Xilinx Vivado® Tools.


FPGA Configuration Flash

Flash TypeFlash SizeNo. config regions
x8 QSPI2Gb storage each of

High-Speed Network Interfaces

Interface TypeQtyLanes per InterfaceData Rate per LaneProtocol Capability
Firefly1428Gbps10/25/40/100G Ethernet, PCIe, Fiber Channel, Infiniband, Aurora

Other I/O Interfaces

Gigabit Ethernet Interface (RJ45)

USB-A for Application use

Dual USB Configuration Sockets (front and back)

GPIO Interface (8 GPIO)

PMOD Interface (8 GPIO)


Software

ARM PS Targeted Reference Design, for host free development.. PCIe based hardware reference designs for Vivado®™ with compatible Windows and Linux driver and host API. Vitis® Board Platform and reference design for ARM PS and AIE development.


Ordering Information
ADM-PA100(s)(f)
ParametercodeParameter Description
FPGA Speeds

BLANK = -2MS,
/3HS = -3HS

Fan Fittedf

BLANK = active (cooling fans)
/NF = passive (no fans)

Note

Other options available. Please contact factory for details.


Deliverables

  • ADM-PA100 Board
  • One Year Warranty
  • One Year Technical Support

Sales Questions

For any sales questions regarding the ADM-PA100, please e-mail us at:

sales@alpha-data.com


Technical Support

For any technical questions regarding Alpha-Data products please e-mail us at:

support@alpha-data.com






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