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Summary

The ADM-PA120 is an adaptable Data Processing Unit suitable for high-performance network-attached acceleration. ADM-PA120 is a PCIe form factor plug-in card, based on the AMD Versal™ Premium Adaptive SoC - VP1202/VP1502.

Applications

In-line NIC processing
Network Traffic Analysis/Threat Detection
CPU offload acceleration
Time Sensitive Networking
Synchronous Ethernet
Network Data Capture
Network Test and Measurement
Scientific Data Capture and front-end signal processing

Board Features

AMD Versal™ Premium Adaptive SoC (VP1202/VP1502)
3x QSFP-DD High-speed each x8 serial links (28Gbps NRZ / 56Gbps PAM4)
4x Timing I/O (incl. 1PPS)
Front Panel GigE Interface
System Monitor
Heatsink with optional fan

FPGA Features (Hard IP)

2x ARM Cortex-A72 MPCore™
2x ARM Cortex-R5F MPCore™
1x 256kB On-Chip Memory with ECC

Specification

Board Format

PCIe 3/4 Length, full height, Dual Slot, includes front panel
Width: 267.2mm
Height: 126.3mm
Depth: 39.9mm

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
ActiveFAN Fitted0°C+55°C-40°C+85°C
PassiveFAN not Fitted0°C+55°C-40°C+85°C

Operating Humidity Range:
Up to 95% (non-condensing)

EMC:
See the ADM-PA120 Declaration of Conformity document


Host I/F

Dual PCI Express Gen5 x8


Target Device

AMD Versal™ Premium Adaptive SoC
VP1202, VP1502 (A2785)

FPGA Resources

Chosen DeviceLUTsDSPsBRAMURAM
VP1202900.2k398447Mb190Mb
VP15021720k744089Mb366Mb

FPGA Hard IP Cores

2x ARM Cortex-A72 MPCore™
2x ARM Cortex-R5F MPCore™
1x 256kB On-Chip Memory with ECC

On Board Memory

Memory TypeNo. BanksMemory Size (per bank)
LPDDR4-SDRAM4512M x 64bit (4GiB) LPDDR4-3733

System Monitor

The ADM-PA120 provides a system monitoring chip which can provide real-time temperature, voltage and current readings of the system, as well as reconfigure programmable clocks and much more. The system monitor can be accessed directly through the USB interface via the front panel (or rear of the board). It also connects to the target FPGA via the USB to UART interface (see block diagram).


Target FPGA Configuration

The FPGA is configurable using a front panel USB interface and the Vivado tool suite (through the onboard digilent module).The configuration flash for the FPGA is writeable via the USB interface and the Vivado tool suite, or the provided Alpha Data Firmware.


FPGA Configuration Flash

Flash TypeFlash Size
x8 QSPI4Gb (2x 2Gb devices)

I/O Interfaces

Interface TypeQtyDescription
FRONT I/O (Front Panel)
QSFP-DD13x QSFP-DD Cages for copper or fibre interconnectivity. Capable of up to 28Gbps NRZ (all QSFP-DD cages) or 56Gbps PAM4 (2 of the QSFP-DD cages).
TIMING I/O I/O (Front Panel)
10MHz external input clock110MHz input (ITU-T G.703 section 20 compliant)
1PPS Input11PPS timing input (ITU-T G.703 section 19.2 compliant)
1PPS Output/Trigger Output11PPS timing output (ITU-T G.703 section 19.2 compliant)
Time Of Day (ToD)1RJ45 Connector for ToD and 1PPS input/Output (ITU-T G.703 section 19. compliant)

Ordering Information

Ordering Code
ADM-PA120(a)(f)
ParameterCodeParameter Description
FPGA ConfigurationaBlank = Default device - AMD Versal™ Premium Adaptive SoC VP1202-2MS - CPM5 Overdrive Enabled
/VP1502 = VP1502 device fitted : AMD Versal™ Premium Adaptive SoC VP1502-2MS - CPM5 Overdrive Enabled
Fan FittedfBLANK = active (cooling fans)
/NF = passive (no fans)
NotePlease Contact sales for other options.

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Resources

Product Conformity

ADM-PA120 UK Declaration of Conformity

ADM-PA120 EU Declaration of Conformity


Deliverables

ADM-PA120 Board
One-Year Warranty
One-Year Technical Support

Support

Please contact Alpha Data for full details on the available support packages for the ADM-PA120.

Sales Questions

Sales Questions

For any sales questions please e-mail us at sales@alpha-data.com

Sales Questions

Technical Support

For any technical questions please e-mail us at support@alpha-data.com

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