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Summary

The ADM-VPX3-7V2 is a high performance reconfigurable 3U OpenVPX format board based on the Xilinx Virtex-7 range of Platform FPGAs.

Features include PCI Express Gen2 interface, external memory, high density I/O using a Vita 57 standard, high Pin Count FMC interface, Gigabit Ethernet Interface, system monitoring and flash boot facilities.
A comprehensive cross platform API with support for Microsoft Windows, Linux and VxWorks provides access to the full functionality of these hardware features.
Placing the PCI Express bridge in bypass allows the creation of a Gen 2 x8 PCI Express endpoint design directly into the target FPGA (Target FPGAs VX330T and VX690T can also support Gen3 x8 PCI Express designs).
The ADM-VPX3-7V2 is available in a cost reduced form without a separate Bridge FPGA for high-volume production orders. A Rear Transition Module (RTM) is available to accelerate development by providing monitor and control access to all Rear (backplane) IO signals.

Applications

Digital Signal Processing
Radar/Sonar Beamforming
ELINT
Image/Video Processing
Data Encryption

Board Features

Separate PCI Express Bridge FPGA
High-density FMC Interface
2GByte on-board DDR3-1600 SDRAM

FPGA Features (Hard IP)

3x PCIe® Gen2 (690T 2x Gen3)

Specification

Board Format

3U VPX (OpenVPX Compliant)

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
AC0Air Cooled Commercial0°C+55°C-40°C+85°C
ACEAir Cooled Extended0°C+70°C-55°C+100°C
AC1Air Cooled Industrial-40°C+70°C-55°C+100°C
CC0Conduction Cooled Commercial0°C+55°C-40°C+85°C
CCEConduction Cooled Extended0°C+70°C-55°C+100°C
CC1Conduction Cooled Industrial-40°C+70°C-55°C+100°C

Operating Humidity Range:
Up to 95% (non-condensing)

EMC:
FCC 47CFR Part 2
EN55022:2010 Equipment ClassB
EN55024:2010
EN60950-1:2006 (+A12:2011)


Host I/F

PCI Express Gen2 x1, x2 or x4 link to separate bridge device with 2GB/s local link to user FPGA
4 DMA Controllers
Interrupt Controller


Target Device

Xilinx Virtex® -7
XC7V585T, XC7VX690T (FF(G)1761)

FPGA Resources

Chosen DeviceFFsLUTsDSPsBRAM
XC7V585T728k582k126028.6Mb
XC7VX690T866k693k360052.9Mb

FPGA Hard IP Cores

3x PCIe® Gen2 (690T 2x Gen3)

On Board Memory

Memory TypeNo. BanksMemory Size (per bank)
SDRAM4512MB DDR3-1600 - 4GByte option available

Target FPGA Configuration

PCI Express direct to SelectMAP port
From Flash direct on power up
External JTAG connector


FPGA Configuration Flash

Flash TypeFlash Size
BPI512MBit

On-board Clock Specifications

Low-jitter 250MHz reference clock, suitable for SerDes applications
Low-jitter 200MHz reference clock for IOB delay circuits
Custom clock inputs available through the FMC interface
Two Software-Programmable Clocks


I/O Interfaces

Interface TypeQtyDescription
FRONT I/O (FMC)
Discrete Digital80 PairsGPIO
High-Speed Serial Links10High-Speed Serial Links
REAR I/O (P2)
High-Speed Serial Links10High-Speed Serial Links (compliant to VITA 46.9 X24S+X12D+X8D)
Discrete Digital32GPIO (compliant to VITA 46.9 X24S+X12D+X8D)

Ordering Information

Ordering Code

ADM-VPX3-7V2/z-y(m)(c)(a)

ParameterCodeParameter Description
Virtex-7 devicezV585T=XC7V585T,
VX690T=XC7VX690T
Virtex-7 speedy1, 2, 2G, 2L, 3
Memorymblank = 2GBytes on board SDRAM (Four banks of 512MBytes),
/4 = 4GByte on board SDRAM (Four banks of 1GByte)
Coolingcblank = air cooled commercial,
/ACE = air cooled extended,
/AC1 = air cooled industrial,
/CC0 = conduction cooled Commercial,
/CCE = conduction cooled Extended,
/CC1 = conduction cooled industrial
Conformal Coatingablank = no conformal coating,
A = Acrylic,
P = Polyurethane
Notenot all FPGA speed grades available in all configurations.
Contact Alpha Data for full details.

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