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ADM-XRC-7K1

AD01238

ADM-XRC-7K1

Datasheet (v2.3)
User Manual (v1.7)
ADM-XRC-7K1

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Kintex-7
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Summary

The ADM-XRC-7K1 is a high performance reconfigurable XMC (VITA 42.3 Mezzanine Card) based on the AMD Kintex-7 range of Platform FPGAs.

Features include PCI Express Gen2 interface, external memory, high density I/O, temperature monitoring and flash boot facilities.
A comprehensive cross platform API with support for Microsoft Windows, Linux and VxWorks provides access to the full functionality of these hardware features.
Placing the PCI Express bridge in bypass allows the creation of a Gen 2 x8 PCI Express endpoint design directly into the target FPGA (x8 for -2/-3 devices only x4 for -1 devices).
There is a build option to include a 10/100/1000 Ethernet Interface connecting the target FPGA to P6.
The optional fitting of the Pn4 connector provides an additional 64 General Purpose IO (GPIO) links to the carrier card.

Applications

Radar/Sonar Beamforming
ELINT
Image/Video Processing
Data Encryption

Board Features

Air-Cooled/Conduction-Cooled Options
Separate PCI Express Bridge
XRM2 I/O Interface

FPGA Features (Hard IP)

1x PCIe® Gen2

Specification

Board Format

XMC (Switched Mezzanine Card, VITA 42)

Environmental Specifications

Temperature Limits
Operating Temperature RangeStorage Temperature Range
MinMaxMinMax
AC0Air Cooled Commercial0°C+55°C-40°C+85°C
AC1Air Cooled Industrial-40°C+70°C-55°C+100°C
CC0Conduction Cooled Commercial0°C+55°C-40°C+85°C
CC1Conduction Cooled Industrial-40°C+70°C-55°C+100°C

Operating Humidity Range:
Up to 95% (non-condensing)


Host I/F

PCI Express Gen2 x1, x2 or x4 link to separate bridge device with 2GB/s local link to user FPGA
4 DMA Controllers
Interrupt Controller


Target Device

AMD Kintex® -7
XCK325T, XCK410T (FFG900)

FPGA Resources

Chosen DeviceFFsLUTsDSPsBRAM
XCK325T407k326k84016Mb
XCK410T508k406k154028.6Mb

FPGA Hard IP Cores

1x PCIe® Gen2

On Board Memory

Memory TypeNo. BanksMemory Size (per bank)
SDRAM2256MB DDR3-1600

Target FPGA Configuration

PCI Express direct to SelectMAP port
From Flash direct on power up
External JTAG connector


FPGA Configuration Flash

Flash TypeFlash Size
BPI512MBit

On-board Clock Specifications

Low-jitter 250MHz reference clock, suitable for SerDes applications
Low-jitter 200MHz reference clock for IOB delay circuits
Custom clock inputs available through the XRM2 interface
Two Software-Programmable Clocks


I/O Interfaces

Interface TypeQtyDescription
FRONT I/O (XRM2)
Discrete Digital146LVCMOS/LVDS I/O (programmable to 1.2, 1.5 or 1.8V)
High-Speed
Serial Links		8High-Speed Serial Links to XRM2
REAR I/O (Pn6)
High-Speed
Serial Links		8High-Speed Serial Links via Pn6 connector (two x4 Links Multiplexed between Front IO or Rear IO)
High-Speed
Serial Links		8High-Speed Serial Links via Pn6 connector (two x4 Links Multiplexed between Front IO or Rear IO). There is a build option for a 10/100/1000 Ethernet Interface to be fitted which connects to P6 (replaces one x4 high speed serial link)
Discrete Digital38LVCMOS/LVDS GPIO connections via Pn6 connector (VITA 46.9 X38s compatible pinout)
Discrete Digital64LVCMOS/LVDS GPIO connections via optional PMC Pn4 connector (2.5V levels with 3.3V compatible inputs)

Ordering Information

Ordering Code
ADM-XRC-7K1/z-y(c)(a)(p)(e)(t)(s)
ParameterCodeParameter Description
Kintex-7 devicezK325T,K410T
Kintex-7 speedy1, 2, 3
Coolingcblank = air cooled commercial,
/AC1 = air cooled industrial,
/CC0 = conduction cooled Commercial,
/CC1 = conduction cooled industrial
Conformal Coatingablank = no conformal coating,
A = Acrylic, P = Polyurethane
Pn4 Fittedpblank = not fitted, /Pn4 = Pn4 Connector fitted
Ethernet I/F Fittedeblank = not fitted, /GE = Ethernet I/F fitted
XMC Connector Typetblank = XMC (VITA 42) Connectors , /X2 = XMC2 (VITA 61) Connectors
Stack Heightsblank = Standard Stack Height, /C7 = 12mm Stack Height
Notenot all FPGA speed grades available in all configurations.
Contact Alpha Data for full details.

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